The
verify tool reads the model given in the specified
scm-file and model-checks it. If
scm-file is omitted, the model is read from the standard input.
The model contains the description of a system of communicating machines along with, optionally, the specification of a set of bad configurations. See
scm(5) for a description of the scm input language.
Upon succesful termination,
verify either reports that the model is safe (if no bad configuration is reachable), or provides a counter-example trace (leading to some bad configuration).
Note that, depending on the input model and on the options that are used,
verify may abort, or compute indefinitely. This problem cannot be avoided due to the undecidability of the model-checking problem for systems of communicating machines.